1. Field of the Invention
The present invention relates to a dry etching method for etching a film having a multilayered structure including an insulation film such as silicon oxide film, and a film of tungsten, molybdenum, or a silicate of each, formed on the insulation film, or a structure including a film of one of those high melting point metal and a polycrystal silicon film.
2. Description of the Related Art
In accordance with higher integration density of semiconductor devices, size of circuits is rapidly reduced. However, such reduction in size creates a number of problems, particularly in the case where its gate electrode or wire is made of:
(1) a metal having low resistivity and melting point, such as aluminum (Al);
(2) a semiconductor material such as polycrystal silicon; or
(3) a metal having a high melting point, such as tungsten (W) or molybdenum (Mo).
Regarding case (1) where Al is used as the gate electrode, since the melting point of Al is close 660.degree. C., a heating process cannot be applied after deposition of Al during the course of forming an element. As a result, by use of Al, it is difficult to achieve a multilayered structure, and the integration density of such a structure cannot be increased. Further, after formation of the Al electrode, a diffusion process, which requires a high temperature of about 1000.degree. C., cannot be performed. Therefore, the gate electrode must be formed after diffusion of the source drain region during the course of manufacturing MOSFETs. However, a certain amount of mask matching allowance has to be set between the gate electrode and the source-drain region, thereby decreasing the integration density of the structure. Further, the combined capacitance of the gate and the source, or the drain, is increased.
Regarding case (2) where polycrystal silicon is used as the gate electrode, the gate, source, and drain regions can be formed in the form of mask such that they self-matches with each other, and polycrystal silicon is relatively stable in a heating process; therefore wiring can be carried out in a multilayered manner, thereby achieving a high integration density. However, a polycrystal silicon film has a resistivity (specific resistance), and therefore it is necessary to add appropriate impurities to the film to decrease its resistance.
In reality, even if the impurities are added, the resistivity can be decreased only to 1.times.10 .circle. 19 .OMEGA. cm, which is still very high as compared to 1.times.10.sup.-6 II .OMEGA. cm of W or 1.times.10.sup.-5 I .OMEGA. cm of Mo. Consequently, when circuit elements on a semiconductor are connected with each other by means of the polycrystal silicon film, transmission of a signal becomes so slow that the operation speed is limited. Similarly, when polycrystal silicon is used as a gate electrode of a MOSFET, the resistance-capacitance product becomes large due to its large resistance. Consequently, it takes long time to raise the voltage of the gate up to a set operation voltage, thereby reducing the operation speed.
Regarding case (3) where a high melting point metal such as W is used as a gate, despite of its high resistivity, W is relatively stable in a heating process of 1000.degree. C., which is required during the course of forming semiconductor devices, because W has a very high melting point. However, as in the case of metals in general, W cannot withstand a process in a high-temperature and oxidating atmosphere.
As described, a satisfactory gate electrode cannot be formed in either of the above described cases. Some of the criteria for a good gate electrode are: the gate electrode is made of a crystal material having a small grain size., the surface of the electrode can be easily stabilized; the chemical resistance thereof is high; the contactibility thereof against Al or an Si substrate is high; and the anti-electromigration property is high.
In the meantime, use of a gate material having a multilayered structure of a metal silicide film such as tungsten silicide (WSi.sub.2) and a polycrystal silicon film has been proposed for manufacturing a semiconductor device having the above-mentioned characteristics, namely a high integration density of polycrystal silicon gate electrode MOSFET, high stability and reliability of the MOSFET in a heating process during the course of manufacture, a low resistivity of the semiconductor device as compared to polycrystal silicon, and a high-speed operability of the device. Moreover, a multilayered structure of a high melting point metal such as tungsten and a polycrystal silicon film has been also proposed.
However, methods which deal with such multilayers have the following problems. In accordance with reduction in size of circuits, gate electrodes are minimized. Accordingly, gate insulation films formed underneath the gate electrodes have been thinned to about 10 nm. Therefore, the processability of a gate electrode depends not on its high melting point metal silicide film crystal, but on its polycrystal silicon film. If a desired shape is not obtained, i.e., the end of a silicon film cannot be withdrawn from the level of the end of a silicide film, deviation of the channel length occurs. Further, as the etching selection ratio between an oxidation silicon film serving as the gate insulation film and a polycrystal silicon film serving as the gate electrode is a main factor for determining the yield of products, an etching process must be carried out based on a high selection ratio between the oxidation silicon film and the gate insulation film. Thus, the process for forming a gate electrode entails a difficult problem.
There have been many reports on etching of a high melting point metal such as tungsten. Some of the examples are D. W. Hess (Tungsten Etching and CF.sub.4 and SF.sub.6 Discharges: Journal of the Electrochemical Society: January 1984, pages 115-120), Picard et al. (Plasma Etching of Refractory Metals (N. Mo. Ta) and Silicon in SF.sub.6 and SF.sub.6 -O.sub.2 : Plasma Chemistry and Pasma Processing Vol. 5, No. 4 1985, pages 335-351), and E. Degenkolb et al. (Selective Dry Etching of W for VLSI Metalization: Journal of the Electro-chemical Society 167, Society Meeting Vol. 85-1, 1985, page 353). In each report, an etching gas containing fluorine (SF.sub.6, CF.sub.4, CF.sub.3 Br or the like) are used. However, with a multilayered structure of a tungsten silicide and a polycrystal silicon, or a heat-oxidation film, a variety of problems, which do not occur with a tungsten single layer, rise during the processing step.
Meanwhile, Chi-Hwa et al. (Anisotropic Plasma Etching of Tungsten: U.S. Pat. No. 4,713,141, Dec. 15, 1987) a method of directionally etching a multilayer of a high melting point metal (for example, W) and a silicon or an insulation film. In this report, tungsten is etched by use of a mixture gas of SF.sub.6 and Cl.sub.2, which serves as an etching gas. According to the method disclosed, Cl, which can suppress reaction between tungsten and SF.sub.6, is adhered on the side surface of an etching pattern, thereby realizing a directional etching.
However, in a practical sense, good etching cannot be performed by use of a fluorine containing gas such as sulfur hexafluoride (SF.sub.6) or a mixture gas of a fluorine-containing gas and a carbon tetrachloride (CCl.sub.4) or Cl.sub.2, which is a conventionally used etching gas for a metal silicide film, because the selection ratio of these gas against silicon oxide is not sufficient as 10 or less.
Further, conventionally, a reactive ion etching technique is employed to etch a polycrystal silicon film. However, in the case where an anode coupling?? mode is employed for patterning, the selection ratio becomes large, but the processed shape will be undesirable, whereas in the case where a cathode coupling mode is used, the selection ratio becomes small, but the desirable shape can be obtained.
Moreover, it is also important that the etching proceeds at the same speed anywhere in a wafer surface. For example, if the etching proceeds faster in the periphery portion of the wafer than in the center portion, a problem occurs, that is, when etching is carried out until the center portion of the polycrystal silicon is completely removed, some of the underlying silicon oxide film in the periphery portion has been already etched.
In the case where the selection ratio against the silicon oxide is low, etching of the periphery portion of the silicon oxide proceeds until the gate insulation film is damaged. Further, since the etching resultants of the periphery and center portions differ from each other, the characteristics of plasma itself are changed. Consequently, an appropriate shape cannot be obtained.
As described, in the conventional process of a multilayer film formed on a silicon oxidation film, consisting of a high melting point metal or a silicide of the metal and a polycrystal silicon, it is difficult to realize an etching sufficient in terms of processed shape, selection ratio, and uniformity.